I cannot recall how many times an engineer or designer has asked how much current, or thermal energy, a microvia can tolerate, or, for that matter, how to even calculate it. The "old" current carrying charts in IPC-A-2221 do not consider HDI structures, which is not surprising, as the charts themselves were developed in the mid 1950s.

The Design Guide for High Density Interconnects (HDI) and Microvias, IPC/JPCA-2315 does not consider the current carrying capacity of HDI structures, as this was not part of the document mandate. The Standard for Determining Current Carrying Capacity in Printed Board Design (August 2009), IPC-2152 does touch on HDI structures and offers the designer/engineer insight how to size his features, given the thermal load. The reliability question also is a factor. If a design requires high enough levels of current to pass through the HDI structures to be a concern, how reliable are the interconnects?

In the Fall of 2010, I was invited to discuss the topic of Thermal Management; HDI and Microvias at the IPC Technology Interchange on Thermal Management. This article summarizes the paper and reviews the techniques explained in IPC-2152 as to the sizing of HDI features where current load may be a concern, the reliability of HDI structures and the various design utilizing stacked and filled vias.

When considering the current-carrying capacity capability of a structure in a PCB, one should consider all the aspects that influence the result. The obvious would be the current, conductor width and thickness. But, in addition, the substrate thickness, substrate material, presence of copper planes, the environment (Is the device to operate in a vacuum?), time dependencies and power dissipation need to be considered.

The old Current Carrying Capacity (CCC) charts only considered the current, trace cross-sectional area and the acceptable temperature rise. One can find many software packages on the Internet, but the majority of these are extrapolations of the old CCC charts. The old charts were quite aggressive for external structures under higher load, and thus a designer may undersize features utilizing the charts. The internal charts were extremely conservative. This is a concern for HDI designs, as a designer could be unnecessarily over sizing his features given the presented data. These old charts have served the industry well, but it is time to move on.

The most accurate CCC calculator I have seen in the industry was developed by Mike Jouppi and dubbed "Thermalman." The Thermalman calculator was utilized in the development and verification of the revised charts in IPC-2152, and not only took into account the current, conductor width and thickness, but also considered the substrate thickness, substrate material, presence of copper planes and the environment. Saturn PCB Design offers a PCB Toolkit which has a CCC calculator based in the IPC-2152 revised charts. So, can a designer simply utilize the existing charts to size HDI features? The answer is "yes," with a caveat. The data in the charts was generated utilizing specific test vehicles. HDI design may be a thin and/or small PCB and thus a translation formula needs to be utilized.